Silica

ISE® Design Suite 13.1 for 7 Series FPGAs

Silica Xilinx ISE Design Suite 13 iconNew to the award winning design tool and IP suite are enhancements which improve productivity across SoC design teams and progression towards true plug-and-play IP that targets Spartan®-6, Virtex®-6 and 7 series FPGAs, including the industry-leading 2-million-logic-cell Virtex-7 2000T device.

Focusing on decreasing development time and cost, ISE Design Suite 13 introduces accelerated verification, plug-and-play IP with IP-XACT support and a new team design methodology that shortens design as Xilinx delivers FPGAs with multi-million system gate capacities, such as the Virtex-7 2000T device built using Stacked Silicon Interconnect technology, as well as capabilities to combine serial, parallel and digital signal processing on a single chip, and offer transceiver speeds of up to 28 Gbps, the need for productivity is paramount in these highly complex designs.

Boost System Level Productivity with the New Xilinx ISE® Design Suite 13.1

  • Support for the new 7 series FPGAs
  • Unified design environment: One design environment with PlanAhead™ for the logic designer
  • Team design methodology: For faster design cycle times with multiple engineers working in parallel
  • Next innovations in Plug-and-Play IP: Easier to access, integrate and protect IP

ISE® Design Suite 13.1 Download

Download ISE Design Suite 13 and begin your design today!

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Video

View the video demo on the new Unified Design Environment with PlanAhead.