Features

Completely Integrated Protocol Handling – Power Down < 1 mA (OSI Model Layer 3 and Below)

• Separate Internal High-PSRR Power Supplies for Analog, Digital, and PA Sections Provides Noise Isolation for Superior Read Range and Reliability
• Dual Receiver Input With AM and PM
• Demodulation to Minimize Communication Holes (Patent Pending)
• Receiver AM and PM RSSI
• Reader-to-Reader Anti-Collision
• High Integration Reduces Total BOM and  Board Area
   - Single External 13.56-MHz Cystal Oscillator
   - MCU-Selectable Clock-Fequency Output of RF, RF/2, or RF/4
   - Adjustable 20-mA, High-PSRR LDO for Powering External MCU
• Easy to Use With High Flexibility
   - Auto-Configured Default Modes for Each Supported ISO Protocol
   - 11 User-Programmable Registers
   - Selectable Receiver Gain and AGC
   - Programmable Output Power (100 mW or 200 mW)
   - Adjustable ASK Modulation Range (8% to 30%)
   - Built-In Receiver Band-Pass Filter With User-Selectable Corner Frequencies
• Wide Operating Voltage Range of 2.7 V to 5.5V
• Ultralow-Power Modes
   - Power Down < 1 mA
   - Standby 120 mA
   - Active (Rx Only) 10 mA
• Parallel 8-Bit or Serial 4-Pin SPI Interface With MCU Using 12-Byte FIFO
• Ultrasmall 32-PIN QFN Package (5mm x 5mm)
• Available tools
   - Reference Design/EVM With Development Software
   - Source Code Available for MSP430